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<a href="#pub-attribs">Data Fields</a>  </div>
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<div class="title">cy_stc_tcpwm_motif_quaddec_config_t Struct Reference<div class="ingroups"><a class="el" href="group__group__tcpwm.html">TCPWM        (Timer Counter PWM)</a> &raquo; <a class="el" href="group__group__tcpwm__motif.html">Motion Interface (TCPWM)</a> &raquo; <a class="el" href="group__group__tcpwm__data__structures__motif.html">Data Structures</a></div></div>  </div>
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<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<div class="textblock"><p>Quadrature decoder configuration structure. </p>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-attribs"></a>
Data Fields</h2></td></tr>
<tr class="memitem:aa937eade500b1495cb0018730e618fd3"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__tcpwm__data__structures__motif.html#ga05b22459eea1820f4afec4eb3e18d1d8">cy_en_position_decoder_mode_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#aa937eade500b1495cb0018730e618fd3">position_decoder_mode</a></td></tr>
<tr class="memdesc:aa937eade500b1495cb0018730e618fd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the position decoder mode to either quadrature mode or Direction count mode.  <a href="#aa937eade500b1495cb0018730e618fd3">More...</a><br /></td></tr>
<tr class="separator:aa937eade500b1495cb0018730e618fd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a8257a32142ac6d6c6e6a766ad2340e2a"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#a8257a32142ac6d6c6e6a766ad2340e2a">phase_A_level_selector</a></td></tr>
<tr class="memdesc:a8257a32142ac6d6c6e6a766ad2340e2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets Phase A level Selector.  <a href="#a8257a32142ac6d6c6e6a766ad2340e2a">More...</a><br /></td></tr>
<tr class="separator:a8257a32142ac6d6c6e6a766ad2340e2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac1052412ec11d09b96d325993f05b137"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#ac1052412ec11d09b96d325993f05b137">phase_B_level_selector</a></td></tr>
<tr class="memdesc:ac1052412ec11d09b96d325993f05b137"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets Phase B level Selector.  <a href="#ac1052412ec11d09b96d325993f05b137">More...</a><br /></td></tr>
<tr class="separator:ac1052412ec11d09b96d325993f05b137"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ab601905e53a3b25faa1311c243ac500b"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#ab601905e53a3b25faa1311c243ac500b">phase_signal_swap</a></td></tr>
<tr class="memdesc:ab601905e53a3b25faa1311c243ac500b"><td class="mdescLeft">&#160;</td><td class="mdescRight">0: Sets Phase A leading signal for clockwise rotation.  <a href="#ab601905e53a3b25faa1311c243ac500b">More...</a><br /></td></tr>
<tr class="separator:ab601905e53a3b25faa1311c243ac500b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a50ae3a552c3e9c67a5246b99a2ec3b70"><td class="memItemLeft" align="right" valign="top">bool&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#a50ae3a552c3e9c67a5246b99a2ec3b70">index_signal_level_selector</a></td></tr>
<tr class="memdesc:a50ae3a552c3e9c67a5246b99a2ec3b70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets Index signal level Selector.  <a href="#a50ae3a552c3e9c67a5246b99a2ec3b70">More...</a><br /></td></tr>
<tr class="separator:a50ae3a552c3e9c67a5246b99a2ec3b70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:afbba3188a63cc87d1c2d62af880384b6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__group__tcpwm__data__structures__motif.html#ga3356b8fbe3ecf4db37de0da6c9c8a0f0">cy_en_quaddec_index_occurrence_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#afbba3188a63cc87d1c2d62af880384b6">progindex_occurrence</a></td></tr>
<tr class="memdesc:afbba3188a63cc87d1c2d62af880384b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets PROGIndex output event occurrence configuration.  <a href="#afbba3188a63cc87d1c2d62af880384b6">More...</a><br /></td></tr>
<tr class="separator:afbba3188a63cc87d1c2d62af880384b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac8ee6e9ddd2f27ce31b101b43ea21505"><td class="memItemLeft" align="right" valign="top"><a id="ac8ee6e9ddd2f27ce31b101b43ea21505"></a>
<a class="el" href="group__group__tcpwm__data__structures__motif.html#gaaccedba14a339b78203457448990469e">cy_en_tcpwm_edge_config_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#ac8ee6e9ddd2f27ce31b101b43ea21505">phae_A_edge_mode</a></td></tr>
<tr class="memdesc:ac8ee6e9ddd2f27ce31b101b43ea21505"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets edge mode for Phase A. <br /></td></tr>
<tr class="separator:ac8ee6e9ddd2f27ce31b101b43ea21505"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:af5ecc5a94afa1fb387ab47d19897249d"><td class="memItemLeft" align="right" valign="top"><a id="af5ecc5a94afa1fb387ab47d19897249d"></a>
<a class="el" href="group__group__tcpwm__data__structures__motif.html#gaaccedba14a339b78203457448990469e">cy_en_tcpwm_edge_config_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#af5ecc5a94afa1fb387ab47d19897249d">phae_B_edge_mode</a></td></tr>
<tr class="memdesc:af5ecc5a94afa1fb387ab47d19897249d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets edge mode for Phase B. <br /></td></tr>
<tr class="separator:af5ecc5a94afa1fb387ab47d19897249d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:aa8a5deb0fac99c85f77a62e1e25100f0"><td class="memItemLeft" align="right" valign="top"><a id="aa8a5deb0fac99c85f77a62e1e25100f0"></a>
<a class="el" href="group__group__tcpwm__data__structures__motif.html#ga0d24ff0aba3c1467d25d773b0ca9e651">cy_en_quaddec_signal_selector_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#aa8a5deb0fac99c85f77a62e1e25100f0">clock_signal_for_phase_A</a></td></tr>
<tr class="memdesc:aa8a5deb0fac99c85f77a62e1e25100f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets input signal for Phase A. <br /></td></tr>
<tr class="separator:aa8a5deb0fac99c85f77a62e1e25100f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac840f6207be8ede66b539a7cec63aacd"><td class="memItemLeft" align="right" valign="top"><a id="ac840f6207be8ede66b539a7cec63aacd"></a>
<a class="el" href="group__group__tcpwm__data__structures__motif.html#ga0d24ff0aba3c1467d25d773b0ca9e651">cy_en_quaddec_signal_selector_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#ac840f6207be8ede66b539a7cec63aacd">clock_signal_for_phase_B</a></td></tr>
<tr class="memdesc:ac840f6207be8ede66b539a7cec63aacd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets input signal for Phase B. <br /></td></tr>
<tr class="separator:ac840f6207be8ede66b539a7cec63aacd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a85550fca70c6ae94a39556e5ddaa5d1a"><td class="memItemLeft" align="right" valign="top"><a id="a85550fca70c6ae94a39556e5ddaa5d1a"></a>
<a class="el" href="group__group__tcpwm__data__structures__motif.html#ga0d24ff0aba3c1467d25d773b0ca9e651">cy_en_quaddec_signal_selector_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#a85550fca70c6ae94a39556e5ddaa5d1a">clock_signal_for_index</a></td></tr>
<tr class="memdesc:a85550fca70c6ae94a39556e5ddaa5d1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets input signal for index. <br /></td></tr>
<tr class="separator:a85550fca70c6ae94a39556e5ddaa5d1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a1b4f9fb30ea71bca0e77a1c122270abf"><td class="memItemLeft" align="right" valign="top"><a id="a1b4f9fb30ea71bca0e77a1c122270abf"></a>
<a class="el" href="group__group__tcpwm__data__structures__motif.html#ga6c930932e77895d9f8fc5a73f63eb7c8">cy_en_low_pass_filter_config_t</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#a1b4f9fb30ea71bca0e77a1c122270abf">low_pass_filter_config</a></td></tr>
<tr class="memdesc:a1b4f9fb30ea71bca0e77a1c122270abf"><td class="mdescLeft">&#160;</td><td class="mdescRight">low pass filter config <br /></td></tr>
<tr class="separator:a1b4f9fb30ea71bca0e77a1c122270abf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ac01f7d094277bfb949bdeb094cc6b6fe"><td class="memItemLeft" align="right" valign="top"><a id="ac01f7d094277bfb949bdeb094cc6b6fe"></a>
<a class="el" href="structcy__stc__quaddec__output__config__t.html">cy_stc_quaddec_output_config_t</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structcy__stc__tcpwm__motif__quaddec__config__t.html#ac01f7d094277bfb949bdeb094cc6b6fe">output_config</a></td></tr>
<tr class="memdesc:ac01f7d094277bfb949bdeb094cc6b6fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configuration for output events of quaddec. <br /></td></tr>
<tr class="separator:ac01f7d094277bfb949bdeb094cc6b6fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<h2 class="groupheader">Field Documentation</h2>
<a id="aa937eade500b1495cb0018730e618fd3"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa937eade500b1495cb0018730e618fd3">&#9670;&nbsp;</a></span>position_decoder_mode</h2>

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          <td class="memname"><a class="el" href="group__group__tcpwm__data__structures__motif.html#ga05b22459eea1820f4afec4eb3e18d1d8">cy_en_position_decoder_mode_t</a> cy_stc_tcpwm_motif_quaddec_config_t::position_decoder_mode</td>
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<p>Sets the position decoder mode to either quadrature mode or Direction count mode. </p>

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<a id="a8257a32142ac6d6c6e6a766ad2340e2a"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a8257a32142ac6d6c6e6a766ad2340e2a">&#9670;&nbsp;</a></span>phase_A_level_selector</h2>

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          <td class="memname">bool cy_stc_tcpwm_motif_quaddec_config_t::phase_A_level_selector</td>
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<p>Sets Phase A level Selector. </p>
<p>0:Active high, 1: Active Low </p>

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<a id="ac1052412ec11d09b96d325993f05b137"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ac1052412ec11d09b96d325993f05b137">&#9670;&nbsp;</a></span>phase_B_level_selector</h2>

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          <td class="memname">bool cy_stc_tcpwm_motif_quaddec_config_t::phase_B_level_selector</td>
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<p>Sets Phase B level Selector. </p>
<p>0:Active high, 1: Active Low </p>

</div>
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<a id="ab601905e53a3b25faa1311c243ac500b"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab601905e53a3b25faa1311c243ac500b">&#9670;&nbsp;</a></span>phase_signal_swap</h2>

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          <td class="memname">bool cy_stc_tcpwm_motif_quaddec_config_t::phase_signal_swap</td>
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<p>0: Sets Phase A leading signal for clockwise rotation. </p>
<p>1: Sets Phase B leading signal for clockwise rotation. </p>

</div>
</div>
<a id="a50ae3a552c3e9c67a5246b99a2ec3b70"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a50ae3a552c3e9c67a5246b99a2ec3b70">&#9670;&nbsp;</a></span>index_signal_level_selector</h2>

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          <td class="memname">bool cy_stc_tcpwm_motif_quaddec_config_t::index_signal_level_selector</td>
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<p>Sets Index signal level Selector. </p>
<p>0:Active high, 1: Active Low </p>

</div>
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<a id="afbba3188a63cc87d1c2d62af880384b6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#afbba3188a63cc87d1c2d62af880384b6">&#9670;&nbsp;</a></span>progindex_occurrence</h2>

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          <td class="memname"><a class="el" href="group__group__tcpwm__data__structures__motif.html#ga3356b8fbe3ecf4db37de0da6c9c8a0f0">cy_en_quaddec_index_occurrence_t</a> cy_stc_tcpwm_motif_quaddec_config_t::progindex_occurrence</td>
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<p>Sets PROGIndex output event occurrence configuration. </p>

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